Well the good news is that this is exactly how a typical RAM chip works. All we have done by way of simplification is to forget details such as timing, voltage and other engineering factors.
Indeed if you look at a picture of a RAM chip you can even see the rectangular grid and the connecting lines as described.
A RAM chip - you can see two memory arrays in the center region
In practice the use of row and column selects is hidden from the CPU. The reason is that it is a little inefficient.
For example, if you use a single bit address you can, in theory, pick out two memory locations – location 0 and location 1. If you use a two-bit address you can pick out four locations – 00, 01, 10 and 11. Using row and column selects you need two lines to pick out a single cell, three lines to pick out two, four lines to pick out four, five lines to pick out six, and so on.
So to connect the CPU to the memory it needs fewer address lines if you specify the memory location as a binary address rather than as a row column select.
So the processor specifies which memory cell it wants to use by giving a binary address. Some simple Boolean logic, address decoding, then converts the address into a row and column select and the memory still works and its efficient.
Address lines are converted to row/column selects
Notice that at the moment we are looking at a single memory chip and this arrangement can only store a single bit. If you want to store a byte you need eight such chips, one for each bit, and eight data input and eight data output lines.
The eight data lines are grouped together into a data input bus and a data output “bus” – a bus is just a group of wires. Early computers really did have separate buses for input and output but today’s machines have a single unified data bus that can be used for either input or output.
If you want more storage than a bank of eight chips can provide then you have to add another bank of eight chips and some additional address decoding logic to select the correct bank. The address lines that come from the processor are generally referred to as an address bus and now we have the fundamental architecture of a simple but modern computer.
The data and address bus
Some designs make use of a single bi-directional data bus but this is mostly a matter of implementation and electronic engineering.
This is all very straightforward but you can see how it gets increasingly complicated in practice. However the use of a binary address explains why for example, 1KByte is 1024 bytes and not 1000 like any sane K should be.
To see why this is natural first ask yourself how many memory locations can be addressed using a single address line? Answer – 2. With two address lines you can address 4. With three you can address 8 and if you carry on in this way you discover the following natural memory sizes:
Notice that with ten address lines you can address the magic number of 1024 memory locations, and this is the closest you can get to 1000 using this system – hence 1K = 1024.
If you follow the same reasoning, adding another ten address lines allows you to address 1K x 1K memory locations and this we call 1MByte, which is 1024x1024 or 1048576 bytes. An odd number unless you realise that it is the nearest power of 2 to one million.
Notice that it is usual to measure disk storage capacity in units of 1000x1024 which makes a disk seem to store more data than it really does - I wonder why?
One of the most important lossless forms of compression is the LZW dictionary based method. It turns up in lots of compression utilities - ZIP, Compress, Deflate and in GIF and PNG format files. It is [ ... ]